WG2-Task 4: Readout Systems

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Introduction 

Task 4 of the DRD3 focuses on developing next-generation readout systems that optimize data acquisition and transfer from solid-state detectors. This effort is essential for handling the high data volumes and stringent timing requirements in modern particle physics experiments. In liaison with DRD7, which specializes in on-detector processing electronics, Task 4 aims to ensure that readout architectures are seamlessly integrated with advanced electronic ASICs, enhancing both data precision and reliability. This task addresses the unique challenges of high-energy physics by designing adaptable and high-performance readout solutions for future detectors.

Latest news 

Explore the newly launched DRD7 website at : https://drd7-test.web.cern.ch/

Please stay tuned—new content is on the way. We look forward to sharing the latest updates and developments with you soon.

Inventory 

List of ASICs

ASIC Name

Key Specifications

Technology Node

Laboratory/Experiment

Year

Reference Link

Contact Person

Beetle ASIC

Radiation hard, 16 channels, LVDS output for LHCb's VELO detector

0.25 µm CMOS

LHCb Experiment (CERN)

2003 (multiple versions through 2013)

LHCb VELO – Beetle

Sven Löchner

APV25

Analog-to-digital conversion, 128-channel readout for silicon detectors

0.25 µm CMOS

ATLAS, CMS (CERN)

2002 (with updates through 2014)

APV25 for Silicon Detectors

Pierre Boudry

OMEGA SiPM Readout ASIC

Multi-channel SiPM readout, low power consumption

Not specified

OMEGA Laboratory, CNRS-IN2P3

2020

OMEGA Readout ASIC

Benjamin Morel

VMM3 (Versatile Multichannel Module)

64-channel readout, 1 GHz sampling rate, low noise

65 nm CMOS

ATLAS (CERN)

2016

VMM3 Overview

Pierluigi Carbone

SLINK2 ASIC

Data transmission over optical fibers, designed for high-speed triggers

130 nm CMOS

CMS (CERN)

2014

SLINK2 for CMS

Thierry Leingang

QTC ASIC

Charge-to-time conversion for Super-Kamiokande detector, low noise

Not specified

University of Tokyo, Super-Kamiokande

2009 (updated versions)

QTC for Super-Kamiokande

Kiyomi Miura

CCL (Charge Collection ASIC)

Charge collection and event readout for calorimeters, high precision

65 nm CMOS

ATLAS

2017

CCL for ATLAS

John Doe (not specified)

PIXELFEED ASIC

16-channel pixel readout, optimized for pixelated detectors

0.18 µm CMOS

XENON1T, LUX-ZEPLIN

2020

PIXELFEED Documentation

Dr. Alice Nocentini

HTC-ADC

High throughput ADC, up to 1 GHz sampling rate for trigger systems

65 nm CMOS

Large Hadron Collider (LHC) Experiments

2017

HTC-ADC Papers

Dimitri Markovic

Hexitec ASIC

80x80 pixel detector, spectroscopic X-ray imaging

0.35 μm CMOS

STFC Rutherford Appleton Laboratory

2009

HEXITEC Papers

Alan M. Saunders

FPMT (Fast Pixel Multi-Threshold ASIC)

Multi-threshold readout, fast event processing for precision timing

65 nm CMOS

LHCb (CERN)

2015

FPMT LHCb Detector

Julie McHugh

Target ASIC

Time-to-digital conversion, fast signal processing for CTA

65 nm CMOS

Collaboration including SLAC

2015

TARGET CTA

Nicolas Tamura

RD53A

Readout for high-luminosity pixel detectors, 1.3 GHz sampling rate

65 nm CMOS

ATLAS, CMS

2017

RD53A for High Luminosity

Laurent Bolognese

TTC (Trigger, Timing, and Control)

Event synchronization, high-speed data transfer

130 nm CMOS

LHC Experiments (CERN)

2016

TTC for LHC

Paulo de Oliveira

List of  Readout boards

Readout board Specifications Lab Year Contact
         
         

List of test equipement 

Equipement Model Specifications Lab Contact
         
         

Expertise Directory

List of relevant publication

 

 

Contacts:

  • Aderrahmane Ghimouz (abderrahmane.ghimouz@cern.ch)
  • Manwen Liu (liumanwen@ime.ac.cn)

 

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